The launch of the eighth-generation TPUs marks a major shift in how Google builds infrastructure, moving away from a “one-size-fits-all” chip to a dual-architecture strategy. Introduced at Google Cloud Next ’26, these chips are the foundation of what Google calls the “agentic era.”

 

For the first time, the lineup is bifurcated into two specialized designs:

 

1. TPU 8t (The Training Powerhouse)

Designed for massive-scale model pre-training, the TPU 8t (codenamed Sunfish) focuses on raw compute power and memory capacity.

 

• Scale: Can link up to 9,600 chips in a single superpod.

   

• Performance: Delivers nearly 3x the compute performance of the seventh-generation Ironwood.

• SparseCore: Includes a specialized accelerator to handle the irregular memory patterns of embedding lookups, which are common in modern large-scale models.

   

2. TPU 8i (The Inference & Reasoning Specialist)

The TPU 8i (codenamed Zebrafish) is engineered for “reasoning” and the high-throughput demands of running millions of AI agents.

 

• Low Latency: Designed to reduce network diameter by over 50%, ensuring rapid response times for interactive agents.

   

• SRAM Advantage: Features 3x more on-chip SRAM (384 MB) than prior generations to keep model data closer to the compute engine.

• Efficiency: Offers 80% better performance per dollar for inference compared to the previous generation.

   

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Comparison at a Glance

Feature	TPU 8t	TPU 8i
Primary Focus	Model Training	Inference & Reasoning
HBM Capacity	216 GB	288 GB
Network Topology	3D Torus	Boardfly
Key Innovation	SparseCore (Embeddings)	CAE (Collectives Acceleration)
Host CPU	Arm-based Axion	Arm-based Axion

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The “Agentic” Shift

The split architecture is a direct response to the rise of AI Agents. While training still requires massive matrix multiplication (handled by the 8t), running an “agent” often involves complex reasoning and “Mixture of Experts” (MoE) models. These models require the lower latency and higher interconnect speeds found in the 8i’s Boardfly topology.

 

This generation also brings Native PyTorch support (TorchTPU), making it much easier for developers to bring existing models over from other hardware environments without major code rewrites.

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